A panel discussion took a closer look at the RISC-V and processor design areas and how it’s creating a healthy and competitive market.
What’s the RISC-V movement all about? What are the major misconceptions about RISC-V? Has it moved from initial experimentation to practical implementation? At the all-digital CES 2021, a panel discussion hosted by Engadget’s Chris Schodt took a closer look at this research project turned design movement.
For instance, Krste Asanovic, chief architect at SiFive, said that RISC-V is not an open-source processor; instead, it’s an open standard, and anybody can implement it. Then, Calista Redmond, CEO of RISC-V International, clarified that open-source hardware is different from open-source software in the sense that you freeze instruction set architecture (ISA) as a durable long-term component. ISA is a vocabulary that the processor understands, and software is written in that vocabulary for the processor to understand it.
Next, anyone can take it and design other aspects like extensions. “It’s free of IP entanglements, and engineers can share the results of their design efforts,” Redmond added. She also elaborated on the RISC-V International’s role as the steward of the RISC-V design base. “The goal is to collaborate on the basic building blocks and leave a lot of room for commercialization and differentiation on top of that.”
Also, being a center of gravity of design activities, RISC-V International is about to launch the first series of online courses to help bring designers and students up to speed.
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RISC-V storage controller
What’s a storage product maker got to do with designing a processor, especially a RISC-V processor? At the RISC-V Summit in December 2020, Western Digital shared the details of a storage controller for the flash array that the storage firm has been designing.
In an SSD—virtually present in every laptop and desktop—an interface device talks to the processor via PCIe or some other interface. A controller is a processor that facilitates the interface with the main CPU as well as flash, and that controller/processor is based on the RISC-V open standard.
Ted Marena, senior business director for RISC-V at Western Digital, said that general-purpose processors do many things for an application; still, for some applications, it’s not really optimal. He mentioned CPU absolutely controlling the main memory as a case in point, and here, RISC-V provides a venue to change that architecture. “RISC-V is like having a micro-architecture, so engineers can design and customize exactly what they want.”
RISC-V in data center chips
The five-year-old upstart Esperanto Technologies uses RISC-V to accelerate AI workloads in data center environments with chips that pack more than 1,000 low-power RISC-V core on a single piece of silicon. Art Swift, president and CEO of Esperanto, said that the company evaluated its own instruction set versus proprietary instruction set versus RISC-V. “RISC-V was very efficient in terms of implementing instruction in software.”
The AI chipmaker, one of the early members of the RISC-V Foundation, decided early on to adopt RISC-V from an economic point of view. Here, RISC-V International’s Redmond added that the formula in processor design, traditionally based on the price/performance matrix, has fundamentally changed. Design flexibility is now the third major consideration in the processor design realm.
SiFive’s Asanovic expanded on this by noting that many people are moving to RISC-V because of its business model. So, instead of a handful processors all based on the same core, there is an opportunity to license from a greater variety of core vendors. There are now seven commercial IP vendors for RISC-V processor designs.
SiFive itself provides a variety of licensable cores that designers can include in their commercial silicon. The company also offers services to enable engineers to take their design all the way to silicon and manufacture chips. He called SiFive’s role analogous to Red Hat in the Linux software world.
This article was originally published on EDN.
Majeed Ahmad, Editor-in-Chief of EDN, has covered the electronics design industry for more than two decades.