Cloud the new frontier for EDA

Article By : Sandeep Mehndiratta, Sridhar Panchapakesan, Teng-Kiat Lee

Under the competitive pressures of the semiconductor industry, chip designers are choosing to migrate to cloud computing technologies.

Until recently, the semiconductor industry’s awareness of the advantages to chip design and electronic design automation (EDA) tools in the cloud was somewhat “overcast.” While many applications that we use in our everyday lives (such as payment processing, business process/collaboration, and big data analytics) all rely on cloud computing technologies, the chip design industry has taken longer to adopt cloud solutions.

The days of chip design houses investing in their own high-performance data-center capacities for arduous tasks such as library characterization are waning. Under the competitive pressures of the semiconductor industry, chip designers are choosing to migrate to cloud computing technologies to keep up with taxing quality requirements, demanding time-to-market targets, and sky-high costs. Innovative, cloud-oriented EDA solutions are just what a semiconductor industry that is defined by these exacting requirements needs to address these challenges — and to thrive.

Let’s take a closer look at how utilizing the public cloud for semiconductor design and verification can help fuel silicon innovation as the benefits of Moore’s law begin to diminish.

The cloud as the new frontier

Until recently, the industry’s outlook on the role of the cloud in silicon development was a mixed bag. That’s because Moore’s law had guided the industry through more than 50 years of growth and innovation. However, as Accenture has noted, the pace of Moore’s law is slowing while “chip development costs have skyrocketed, competition is coming from non-traditional places, and customers are demanding exponentially more power and functionality to support exciting new applications such as the internet of things (IoT), artificial intelligence (AI), and, soon, quantum computing.”

In an increasingly competitive landscape where compute capacity has held up chip designs from being brought to market faster, cloud computing is naturally becoming a viable option for companies to procure the needed resources for designing and verifying modern systems on chip (SoCs).

While chip design houses have their own varying philosophy, there are some universal market drivers that are influencing more chip designers to move to the cloud.

Efficient time and improved quality

As chips continue to become both larger and more complex, chip design and verification resources are coming to a head in the face of increasing time-to-market pressures. Concurrently, engineering workloads are growing with engineers consistently taking more on with fewer available resources. Instead of running EDA solutions on an on-site data center, using the cloud allows for more compute resources to accelerate fundamental chip design and verification processes. Not to mention that there’s also the benefit of elasticity — the ability to quickly scale up or down based on needs. It is this flexibility, even in time-sensitive scenarios, that make the migration to the cloud more attractive for chip designers.

Let’s consider library characterization, a highly parallelizable task that needs a large amount of compute resources. Before cloud computing was popularized, chip design houses were forced to invest in their own high-performance data-center capacities for these notoriously difficult workloads. As a result, systems would either be over- or under-utilized or would require sequencing of workloads, in turn causing delays. Cloud computing, on the other hand, can reduce turnaround time from weeks down to days by providing on-demand access to as many compute resources as needed when needed.

To maintain a high quality of results for advanced-nodes designs, lower power designs, and designs that are pushing at reticle limits, verification efforts are needed at all stages of the design flow. But when in-house compute resources are not limitless, design managers are asked to walk the delicate balance of time to market and quality of results.

With cloud implementation, however, there are virtually “unlimited” resources as the cloud provides the heft to perform massive simulation, timing signoff, and physical verification tasks that would strain or crush on-premises compute resources. Cloud computing technology has now made the once nearly impossible task of trading off quality and time efficiency very much within design managers’ reach.

Synopsys_ss cloud computing technologies
Cloud computing technologies have provided chip designers with a variety of benefits and helped fuel innovation in the semiconductor industry.

Lower cost and elasticity

While getting products with the highest quality to market sooner is always the No. 1 goal, producing chips at the lowest possible cost is a very close second. By using the cloud, traditional chip design houses (and even small startups) could adopt a hybrid workflow model where on-premises compute resources are augmented by cloud resources for burst usage periods as a means to decrease the costs of owning their own data centers. The cloud provides a logical conduit for access to the latest generation compute and storage resources when needed, with the flexibility of a pay-as-you-go model.

The elasticity of the cloud can also contribute to better cost of results. As cloud vendors develop lower cost compute resources, such as spot instances utilizing excess capacity, they may be able to offer lower pricing. A design company should look for EDA solutions that can take advantage of these opportunities.

The elephant in the room: security

While there are obvious benefits to migrating to the cloud, there is still some hesitancy in the semiconductor industry based around concerns over security and system uptime. The adoption of modern cloud security and cloud-native processes and technologies helps ensure that EDA workloads will run on a secure, monitored cloud infrastructure. EDA vendors work closely with cloud security vendors to adapt their technologies to protect EDA workloads and prevent data leakage by applying strong identity and access management capabilities.

In most cases, cloud vendors operate under a shared responsibility model where security of the cloud is the vendor’s responsibility while security in the cloud is left to their customers. In order to proactively plan security models, the EDA industry should have a clear understanding of what this shared responsibility means prior to implementation. That means asking questions like: Are cloud vendors building in security from the ground up in their infrastructures and applications, as well as ensuring operational security? Are EDA vendors utilizing encryption and next-gen monitoring and troubleshooting tools that are adapted to cloud environments?

As for system uptime, EDA customers can rest easy with the knowledge that cloud providers build in plenty of redundancy to ensure high availability and resiliency of their compute resources. EDA applications can be run across high availability clusters for better reliability and uptime.

The future of cloud-ready EDA

The drive for chip makers to innovate swiftly and at a lower cost is relentless under competitive pressures for high-performing silicon with ever richer functionalities. At the same time, innovation among EDA and IP vendors is resulting in cloud-optimized solutions that are up to the effort of supporting sky-high compute demands and reduced cycle times for chip design and verification tasks.

What has become apparent is that EDA in the cloud is clearly more than a trend; it is a way forward for an industry that is grappling with exploding computational needs along with a continued push to reduce cycle times for design and verification. In short, as EDA in the cloud continues to become more sophisticated, this, in turn, is accelerating its adoption as an avenue for continued semiconductor innovation. It’s a virtuous cycle that promises good things for the industry as a whole and the many sectors that rely on advanced silicon chips.

This article was originally published on Embedded.

Sandeep Mehndiratta is vice president, enterprise, go to market, at Synopsys, where he is responsible for optimizing GTM motion for Synopsys products and solutions, including driving the cloud strategy for the company’s EDA solutions.

Sridhar Panchapakesan is program management director for cloud engagements at Synopsys, where he is responsible for enabling customers to successfully adopt cloud solutions for their EDA workflows. He drives cloud-centric initiatives, as well as marketing and collaboration efforts with foundry partners, cloud vendors, and strategic customers at Synopsys. He has 25+ years of experience in the EDA industry and is especially skilled in managing and driving business-critical engagements at top-tier customers.

Teng-Kiat Lee is the technical marketing director for cloud engagements at Synopsys, responsible for product roadmaps. He has over 25 years of experience in EDA software design and IC design management. His expertise includes product management/engineering, custom analog and mixed-signal EDA tools, mixed-signal simulation, human computer interface, and more.


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