# Create a versatile voltage-controlled voltage regulator based on the LP2951

#### Article By : Anthony Smith With the addition of just a single component, this idea transforms a conventional circuit into a much more versatile and flexible voltage regulator.

The LP2951 voltage regulator is commonly used in applications requiring a preset output voltage, which can easily be configured using two resistors. The device provides low dropout regulation over a wide range of output voltages ranging from 1.235V to around 30V. Being inexpensive and available from several manufacturers (including MaxLinear, Microchip, ON Semiconductor, and Texas Instruments) makes it a popular choice for circuits that demand a micropower regulator capable of sourcing up to 100 mA of load current. Figure 1 Transform a conventional circuit into a much more versatile and flexible voltage regulator.

The basic circuit arrangement is shown in Figure 1, where resistors R1 and R2 set the output voltage according to the following simple formula:

VOUT = VREF(1 + R1/R2) + IFB.R1 (volts)

Here, VREF is the internal reference voltage (typically 1.235V) appearing at the feedback (FB) pin, and IFB is the bias current flowing into the feedback pin. Typically, IFB is on the order of 20 nA, so, provided R1 is not excessively large, the error contributed by IFB can be ignored and the expression for the output voltage reduces to:

VOUT = VREF(1 + R1/R2) (volts)

The output voltage can be adjusted by replacing fixed resistor R1 with a variable resistance such as a trimmer pot. With appropriate selection of R2, this allows VOUT to be varied over a wide voltage range up to a maximum of around 30V. Despite its flexibility, this approach has limitations: in particular, it can only be used to set the output voltage for a single regulator and the need for manual adjustment of the pot provides no means of direct, linear electronic control. Moreover, examination of the equation above reveals that even with R1 set to zero, VOUT cannot be less than VREF (1.235V).

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However, the addition of just a single extra resistor, R3, allows the output voltage to be controlled directly by a DC voltage, VC (Figure 1). The relationship between VOUT and VC is inverse and linear, i.e., increasing VC results in a proportional decrease in VOUT. Subject to certain conditions, almost any relationship can be established. Furthermore, there is an additional bonus in that VOUT can now swing lower than VREF. In fact, this method allows VOUT to approach ground (0V).

This simple scheme enables a relatively ‘weak’ voltage (for example, derived from a DAC or op amp) to control much higher voltage and power levels. It also allows a single voltage to control multiple regulators, each of which can have its own unique control characteristic.

The values for R1, R2, and R3 required to generate the desired VOUT versus VC relationship are calculated using the equations in Figure 2, where VOUT(min) is the lowest required value of output voltage occurring when VC is a maximum, (VC(max)) and VOUT(max) is the highest required value of output voltage occurring when VC is zero. When calculating k, VREF can be taken as its typical value (1.235V). Figure 2 Use these design equations to calculate the values for R1, R2, and R3 that are required to generate the desired VOUT versus VC relationship.

Having determined k using equation 1, choose a preferred value for R3 then use equations 2 and 3 to calculate values for R1 and R2, respectively. It may be necessary to try several different values of R3 in order to arrive at suitable preferred values for R1 and R2. When you have selected values for R1, R2, and R3, the value of VOUT at any value of VC can be calculated using equation 4.

It is important to satisfy the conditions shown in Fig. 2. The first condition requires that the maximum value of VOUT must be greater than VREF. This is necessary to ensure that the numerator of equation 2 cannot be negative. The requirements of condition 2 must be satisfied in order to ensure that the denominator of equation 1 cannot be zero or negative.

A few examples will help to illustrate the design process.

Example 1

In this example, we wish to generate an output voltage ranging from 1.0V to 10.0V using a control voltage ranging from zero to 5.0V, that is, VOUT(min) = 1.0V occurring at VC(max) = 5.0V, and VOUT(max) = 10.0V (occurring when VC = zero).

Conditions 1 and 2 are both satisfied so we can use equation 1 to calculate k, which turns out to be 0.34. Inserting this value into equations 2 and 3 and trying different values of R3, we find that suitable preferred values are: R1 = 27kΩ; R2 = 5.1kΩ; R3 = 15kΩ. The results for this example are taken from a test circuit connected to a 330Ω load with input voltage VIN = 12.0V (Figure 3). Figure 3 This graph shows the test results for example 1, where R1 = 27kΩ; R2 = 5.1kΩ; R3 = 15kΩ; and VIN = 12.0V.

Example 2

Here, we have VOUT(min) = 0.25V occurring at VC(max) = 2.0V, and VOUT(max) = 25.0V (at VC = zero). With conditions 1 and 2 satisfied, equation 1 yields a value of 1.80 for k. Putting this value into equations 2 and 3 yields suitable preferred values of: R1 = 240kΩ + 7.5kΩ; R2 = 36kΩ; R3 = 20kΩ. The results are taken from a test circuit with RLOAD = 1kΩ and VIN = 26.0V (Figure 4). Figure 4 This graph shows test results for examples 2 and 3.

Example 3

Here, we require VOUT(min) = 0.5V occurring at VC(max) = 2.0V, and VOUT(max) = 12.0V (at VC = zero). Conditions 1 and 2 are both satisfied and equation 1 yields a value of 1.94 for k. Inserting this value into equations 2 and 3 yields: R1 = 270kΩ and R2 = 91kΩ when R3 = 47kΩ. The results were measured on a test circuit with RLOAD = 1kΩ and VIN = 13.0V (Fig. 4).

All of the above examples illustrate the inverse relationship between control voltage and output voltage. As VC rises, tending to pull the voltage at the FB pin higher, the closed loop feedback forces the regulator to reduce VOUT in order to maintain the potential at FB equal to the internal reference voltage, VREF. Furthermore, in each example, VOUT(min) is less than VREF (significantly less in example 2). The output is able to go lower than VREF because the regulator must pull its output toward zero in order to hold the voltage at the FB pin equal to VREF as VC rises toward its maximum value. Be aware that if the regulator is very lightly loaded and/or if R1 and R2 are relatively large values, the measured output voltage may differ from the expected value, especially at low levels of VOUT. This appears to be due to a minimum loading requirement of the LP2951. This problem can be eliminated by increasing the loading and/or by decreasing the values of R1 and R2.

Examples 2 and 3 show how a single control voltage could be used to control two (or more) regulators having very different output characteristics. With the addition of just a single component, the scheme transforms a conventional circuit into a much more versatile and flexible voltage regulator, which retains all of the benefits (low dropout, current- and thermal-limiting, etc.) of the LP2951.

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