For a wearable device required to operate for an extended amount of time, it is imperative to design for efficient power management and a compact form factor.
The Internet of Things (IoT) relies on hardware with the smallest size and the least power loss. Common design goals of size and efficiency for a power design tend to be mutually exclusive and so tradeoffs are unavoidable. This usually requires the designer to compromise with an increase in product size to obtain a specific power consumption goal. However, with an integrated power management IC (PMIC) operating three independent switching regulator outputs while using a single inductor, both size and power loss are minimized to enable IoT hardware with a compact form factor operating from a Li+ cell.
The proliferation of the internet across all sectors, from residential and commercial to industrial, continues to fuel exponential growth in data acquisition. Autonomous “smart” things – i.e., appliances, automotive, healthcare and wearable devices, robotics, and other technologies that can identify themselves on the internet – process data and collectively form the network commonly known as the IoT. Although the definition of a “smart” thing in the IoT world loosely defines a node that generates information of substantial value, the implementation details of the hardware responsible for data acquisition requires meticulous design planning.
For a wearable device required to operate for an extended amount of time – e.g., for infotainment, fitness, healthcare, and in the military – it is imperative to design for efficient power management and a compact form factor. An extended operating time for wearable IoT devices relies on maximizing the available battery capacity and designing for ultra-low power while maintaining a small solution footprint.
Maximize battery capacity
A battery is a temporary, unregulated power source for portable electronics that comes in two flavors: primary, which defines a one-time use power source, and secondary, which in general provides half the energy density but allows recharging. The most common rechargeable cell chemistries are lithium-ion (Li+) with a nominal voltage of near 3.7V: LiMn2O4, LiCoO2, LiNiO2, Lithium Nickel Manganese Cobalt Oxide (NCM), and Lithium Nickel Cobalt Aluminum Oxide (NCA). One rechargeable cell chemistry – LiFePO4 – has a nominal voltage around 3.3V. While powering a device, the battery becomes loaded due to its finite source resistance. As a result, the available voltage of the battery decreases while in use due to the current consumption of the load.
The higher the power consumed by the load, the more significant the decrease in battery voltage and effective capacity. A decrease in effective capacity means less available time exists for the same current supplied to downstream circuitry. Ambient temperature and charge/discharge cycles also negatively affect the battery’s effective capacity. Therefore, a battery requires a form of regulated distribution with the following features:
The highest minimum input voltage required in a power management system is the lowest battery voltage the system can operate on. Maximizing the available battery capacity requires designing a power tree that can use the lowest battery voltage possible. Take note that batteries come specified with a minimum cut-off voltage before the battery becomes stressed and lifespan starts to decrease considerably. Therefore, the power tree should be designed to operate down to the battery’s minimum cut-off voltage and should enter under voltage lockout (UVLO) shortly afterward.
Design for maximum system efficiency
A low-weight, compact form factor in a wearable IoT device requires a miniature battery that comes with reduced runtime. When the voltage rail is not in use, the power management system should shut down. To efficiently manage voltage rails in wearable IoT designs, a PMIC can provide flexibility by enabling/disabling power blocks when required. Thus, a PMIC allows a wearable IoT device to operate for a longer time between charges.
A PMIC that integrates the power tree provides design flexibility by administering power sequencing and switching, protection, monitoring, and control. Also, an integrated power tree allows maximum system efficiency compared to the same power tree solution designed using discrete components, i.e., the regulators exist in a separate package apart from the PMIC. If access to all circuitry is internal to an integrated power tree, charging/discharging pin capacitance does not exist between power circuit blocks and, hence, reduces power loss.
A power management system performs DC-DC power conversion in three distinct forms differing in physical size, flexibility, and efficiency.
In general, capacitor-based switching regulators – also known as charge pumps – are not standard due to their limited output voltage scalability. For example, although a suitable choice for gate drivers, charge pumps have reduced ability to output the required current needed at specific voltages required by circuit blocks in a wearable device. For this reason, linear and inductor-based switching regulators provide the most flexible power management.
A buck regulator provides a constant input voltage to a linear regulator to maximize efficiency. Figure 1 shows a common single-inductor power tree in a wearable IoT device for the following circuit blocks: haptic feedback, display, wireless communication, and the microprocessor core. In this typical implementation, the branch that starts from the Li+ cell, goes to the buck regulator, and ends at the 1.85V LDO linear regulator results in a total efficiency of 81.2%. If the 1.85V LDO linear regulator were to have been connected directly to the Li+ battery, efficiency would equal to 48.7%, which would translate to a 10x increase in power loss. The value of a buck regulator in a battery-powered system cannot be overstated.
Equations (1) and (2) calculate the power loss PL and efficiency η for linear regulators only, and equations (3) and (4) calculate the same parameters applicable to all linear and switching regulators.
Applies to series linear regulators ONLY
Applies to any linear and switching regulators
In Figure 1, the total product of each power block efficiency defines the system efficiency ηsystem = 69.1%. The sum of each power block power loss defines the system power loss Psystem loss at 56.7mW. The 3.3V LDO with a maximum dropout voltage of 100mV dictates the minimum input voltage required by the system, which is 3.4V. The actual system footprint FP is determined by the wafer-level package (WLP) size (2.72mm x 2.47mm), the 0402 capacitors (in imperial units), and the 2.2µH 0805 inductor as shown in Figure 2.
Table 1 provides the physical dimensions of 0402 and 0805 surface-mount component packages.
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