With an increasing emphasis on time-to-market, space-industry OEMs need better communication between EDA suppliers and component vendors to ensure schematic symbols, footprints, and 3D models are readily available.
I’ve experienced a lot of pain with a recent project and wanted to share some thoughts: I was doing the PCB layout on a time-critical project and needed component footprints and 3D step models. Many space-grade parts suppliers don’t supply these, which means you either create them or buy from a number of specialist companies. The other issue is that there are numerous legacy file formats and EDA tools do not support all of these, e.g. DXF, which does not contain electrical information, but can include a lot of unwanted drawing data and doesn’t always import painlessly into CAD software.
With an increasing emphasis on time-to-market, space-industry OEMs need better communication between EDA suppliers and component vendors. While it might be quicker to manually design the footprint for a 6-pad surface-mount device without automation, a 1700-pin FPGA is a different matter.
A number of options exist for satellite and spacecraft manufacturers. Digi-Key offers PartQuest, a free database of schematic symbols and footprints of their catalogue parts compatible with the Mentor Graphics’ Expedition and PADS flows. If a component exists within their database but symbols and footprints don’t, you can freely request these. My experience has shown a quick 24-hour turnaround. SnapEDA offers a similar service and you should check whether its .lia file format is compatible with your design flow.
Ultra Librarian offers a free online convertor that translates the neutral .bxl CAD format to your desired EDA tool, where component suppliers provide device datasheets (Figure 1).
The issue for the space industry is that many of our specialised components are not supported by the above options for a number of reasons. For example, not all Hi-Rel vendors voluntarily provide schematic symbols, footprints, or 3D models, and do not use distributors such as Digi-Key. Also, the various spacecraft manufacturers design with different EDA tools, which may not be the same as that used by your parts supplier, and landing patterns for surface-mount ICs are not provided, as OEMs have different lead-forming preferences, or the automated graphical cell editors contained within our expensive CAD software do not support some of the more exotic footprints used by space-grade components (Figure 2).
The whole experience, while not new, has been incredibly frustrating and unnecessarily time consuming, leaving only one option: to manually create custom pads and padstacks to form the required landing pattern, all of which impacts our ability to meet time-to-market needs.
While IPC 7351 publishes some guidelines on how to size PCB pads given package dimensions, lead pitches, and spacing, I acknowledge there may be some IP issues and/or manufacturing limits related to how individual OEMs and specialist sub-contractors form these. A useful starting place is to use a pad length of 3 mm, a width of 0.2 mm greater than the maximum lead width specified within the device datasheet, a separation slightly greater than the package body width, and 0.5 mm stand-off for inspection and/or thermal adhesive. While lead forming and trimming is a topic in its own right, their final geometry impacts pad size and overall footprint, while their height and shape can affect connectivity to underlying planes (Figure 3). NASA has published guidelines for surface-mount devices to maximise solder adhesion and reliability, i.e. compliance to mission vibration levels, thermal expansion, and G-forces.
As the space industry starts to use more diverse electronics, better communication between EDA companies, component vendors, and spacecraft manufacturers is required to ensure schematic symbols, footprints, and 3D models are readily available. Given how much we have to pay for Hi-Rel parts, my recommendation is that suppliers should provide independent Enterprise Data eXchange (EDX) footprints and STEP models with device datasheets, or outsource this task to a third-party company who can generate a neutral CAD format accepted by the major EDA tools. Not having this information in 2019 is no longer acceptable and I now source alternate parts to ensure we deliver on-time—lots of respect and thanks to those suppliers who already do and don’t forget to include the cost of forming and trimming when pricing your project!
Until next month, the person who can generate the footprint shown in Figure 2 in the shortest time will win a Courses for Rocket Scientists World Tour t-shirt (all dimensions in mm). Congratulations to Lukas from Austria, the first to answer the riddle from my previous post.
Dr. Rajan Bedi is the CEO and founder of Spacechips. Spacechips will be teaching a course on Right-First-Time PCB Layout for Spacecraft Avionics from next year.