How PMICs operate in image sensor-based designs

Article By : Oleh Lastovetskyi

A single-chip PMIC solution for advanced sensor applications takes less PCB space and lowers power consumption and design cost.

Modern electronic devices often have at least a few analog rails in their power profile. This is especially applicable in consumer electronics, automotive, medicine, and smart home devices. Building an optimized power profile requires devices to be space-constrained and efficient both in functionality and current consumption.

Therefore, it’s important to select advanced sensors or other analog power components during the design phase. It’s also important to select a robust power supply solution to achieve desired system performance.

Here, power management integrated circuits (PMIC) can be used to provide high-quality power while saving the PCB area. PMICs encompass high-performance LDOs, built-in power sequencer, GPIOs, logic elements, temperature sensor and a variety of protection, enabling design engineers to replace several other ICs. This also makes the final product more compact and the development process easier.

Below is a design case study that illustrates how a PMIC operates in an image sensor-based design.

PMICs in image sensor applications

An image sensor is a typical consumer device making use of PMICs. It’s common in applications such as mobile phones, robotics, and augmented reality (AR) gadgets. Image sensors have a complex power profile both in terms of power consumption and other qualitative characteristics such as output noise and power supply rejection ratio (PSRR).

Proper sequencing is one of the requirements to avoid sensor malfunction and guarantee system reliability. PMICs managed by a power sequencer are a solution that is often used for applications with image sensors onboard. The sequencer can either be a physical IC or part of the main controller. In any case, power sequencer provides proper timings for both power up and power down. Typical image sensor delays between rails are within the range of 10 μs to 10 ms.

Applications with multiple image sensors onboard are popular, and they inevitably require a robust power supply and proper sequencing. This can be done with dedicated PMICs per sensor and a power sequencer. Although this solution occupies less space than a discrete LDO approach, it takes up space anyway. This is also true for host controller’s code complexity since sequencing is often handled by its resources.

This article presents the example of SLG51002, a PMIC that provides the functionality of discrete power sequencers that are timing-based; it also provides the event-triggered sequencing. Event triggers can be sourced from a variety of inputs, including 6 GPIOs, the I2C line and flags like temperature, VOUT_OK and current limits. Combinational logic elements allow users to create a specific design.

How independent sequences work

Let’s show how a typical PMIC can manage two image sensors with independent power sequences. Each of these sequences is expected to be triggered by external control signals. Here, SLG51002 is used as a single-chip solution, and the main objective is to reduce the load on MCU and lower its firmware complexity.

The power supply (enable/disable) sequence for image sensor 1 is triggered by a signal on GPIO3. Similarly, image sensor 2 is triggered by GIPO4. The power supply for image sensors 1 and 2 can be controlled independently from each other. As an additional feature, the MCU can check LDO status using GPIO1 for image sensor 1 and GPIO2 for image sensor 2, as well as read them through I2C.

Sensor 1 sequence includes four power supply rails and an optional status flag where GPIO1 is used. The optional status flag can be implemented at GPIO1, which is only raised if all voltages are VOUT_OK for mentioned power rails.

Figure 1 Desired Power-UP and Power-DOWN sequences are shown for image sensor 1. Source: Renesas

Sensor 2 sequence includes three power supply rails and an optional status flag where GPIO2 is used. An optional status flag can be implemented at GPIO2, which is only raised if all voltages are VOUT_OK for mentioned power rails.

Figure 2 Desired Power-UP and Power-DOWN sequences are shown for image sensor 2. Source: Renesas

Figure 3 shows the internal routing of a PMIC. Sensor 1 control signal from GPIO3 triggers “Power Sequencer”. This unit will perform both Power UP and Power DOWN sequences for Sensor 1. Outputs from Resource 0-4 are connected in the desired order and routed to the LDO regulators.

Figure 3 Power sequencer design configuration is shown for sensor 1. Source: Renesas

Figure 4 shows preconfigured delay time between LDOs. To open this menu, double-click the Power Sequencer block. In case all LDOs are properly enabled, the look-up tables (LUTs) will form the GPIO1 signal that will go to a high level.

Figure 4 The diagram shows the Power-UP state control timing. Source: Renesas

Figure 4 and Figure 5 show the configuration window of the Power Sequencer block. The power slot delay time can be set both for power-UP and power-DOWN. The design is configured with a delay of 10 ms per LDO.

Figure 5 The diagram shows the Power-DOWN state control timing. Source: Renesas

Like Figure 3, Figure 6 shows the internal routing of a chip. The sensor 2 control signal from GPIO4 is routed on DLY1, DLY2 and DLY3 blocks. The Delay of each block can be set independently both for power on and off. The presented design has a delay between rails equal to 10 ms. GPIO2 will raise a flag after all listed LDOs are properly enabled.

Figure 6 Design configuration is shown for Delay blocks in sensor 2. Source: Renesas

Measurement results

The full-chip design shows two independent power sequencers, each controlled by an external signal. The resulting waveforms are presented below.

Figure 7 Turn-on and Turn-off are shown for sensor 1 (CAM1). Source: Renesas

Figure 8 Turn-on and Turn-off are shown for sensor 2 (CAM1). Source: Renesas

Figure 9 Turn-on is shown for sensor 1 (CAM1) and sensor 2 (CAM2) and turn-off is shown for sensor 2 (CAM2) and sensor 1 (CAM1). Source: Renesas

Figure 10 Turn-on is shown for sensor 2 (CAM2) and sensor 1 (CAM1) and turn-off is shown for sensor 2 (CAM2) and sensor 1 (CAM1). Source: Renesas

This article has demonstrated how complex sequencing with multiple independent scenarios can be handled using a single-chip power solution for advanced sensor applications. Using a PMIC will take up less space on the board, will reduce current consumption, and lower the costs of the final design solution.


This article was originally published on EDN.

Oleh Lastovetskyi is junior applications engineer at Renesas Electronics.


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