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Often used in medium power, isolated applications, a continuous-conduction-mode 9CCM) flyback converter is characterised by lower peak switching currents, less input and output capacitance, reduced EMI and a narrower operational duty-cycle range than discontinuous-conduction-mode (DCM) operation.

These virtues, along with being low cost, mean they have been widely adopted in commercial and industrial applications. This article will provide the power stage design equations for a 53Vdc to 12V at 5A CCM flyback.

Figure 1 shows a detailed 60W flyback schematic, operating at 250kHz. The duty-cycle is selected to be 50% maximum at the minimum input voltage of 51V and maximum load. Although operation beyond 50% is acceptable, it is not necessary in this design. The duty-cycle will decrease only a few per cent while in CCM operation because of the relatively low high-line input voltage of 57V. However, if the load is greatly reduced and the converter enters DCM operation, duty-cycle will significantly decrease.

**Figure 1:** *60W CCM flyback converter schematic*

To prevent core saturation, the volt-second product for the windings on/off times must balance. This equates to:

Set dmax to 0.5 and calculate the turn-ratios for Nps12 (Npri : N12V) and Nps14 (Npri : N14V):

Operating duty-cycle and FET voltage can be calculated now that the transformer turns ratio is set.

Vdsmax represents the “flat top” voltage on FET Q2 drain without ringing. Ringing is typically related to the transformer leakage inductance, parasitic capacitances (T1, Q1, D1) and switching speed. Derate the FET voltage an additional 25-50%, selecting a 200V FET. The transformer must have excellent coupling between windings and a maximum leakage inductance of 1% or less, if possible, to minimise ringing.

When Q2 is on, diode D1 has a reverse voltage stress equal to:

Ringing is common when the secondary winding swings negative due to leakage inductance, diode capacitance and reverse recovery characteristics. Using ultrafast (<35nS), Schottky and SiC diodes can help minimise reverse-recovery effects and minimise diode snubber losses. D1 conducts during the FET off-time with a flat-top current of:

I selected a 30A/45V rated D²PAK package to reduce the forward voltage drop to 0.33V at 10A. Power dissipation is equal to:

A heatsink or airflow for proper thermal management is recommended. You can calculate the primary inductance from:

where is the estimated efficiency, and POUTMIN is where the converter enters discontinuous-mode operation (DCM), which is typically 20-30% of POUTMAX.

Peak primary current occurs at VINMIN and is equal to:

This is necessary to determine the maximum current sense resistor (R18) value to prevent tripping of the controller’s primary over-current (OC) protection. For the UCC3809, the voltage across R18 cannot exceed 0.9V to guarantee full output power. For this example, I choose a 0.18Ω value. A smaller resistance is acceptable as it reduces power loss. But too small a resistance increases noise sensitivity and makes the OC threshold high, risking transformer saturation or even worse, stress-related circuit failure during an OC fault. The power dissipated in the current sense resistor is:

With calculated FET conduction and turn-off switching losses are estimated from: