Controlling spot and integrated noise in a two-stage transimpedance design

Article By : Michael Steffes

In this article, I will illustrate a methodology to control spot and integrated noise using a first-stage DC-coupled transimpedance design (charge amplifier) followed by a moderate-gain FDA stage.

A very common application is to use a low-noise, moderate-gain first stage in a sensor path, followed by a fully differential amplifier (FDA), to provide added gain and centering on the common-mode voltage required by the analog-to-digital converter (ADC). It’s also possible to design the second stage to add negligible spot noise in the frequency span of interest and control broadband integrated noise.

In this article, I will illustrate a methodology to control spot and integrated noise using a first-stage DC-coupled transimpedance design (charge amplifier) followed by a moderate-gain FDA stage. Adding a third-order filter design in this FDA stage will control the integrated noise and subsequent signal-to-noise ratio (SNR). I will demonstrate the design considerations for a unipolar photodiode detector input current to a fully differential output at every step.

Cascaded amplifier noise considerations

A common misconception is that the input-referred noise of the second-stage amplifier, after a low-noise first stage, needs to be as low as the first stage. There are several ways to show that this is not true. If you root-mean-square (RMS) the input-referred spot noise of the second-stage amplifier with the spot noise delivered out of the first stage, you can quickly assess how high the second-stage input-referred noise can get before meaningfully changing the total equivalent input spot noise at the second-stage input. Once you have the combined spot noise at the interface between the stages, both the noise and signal will get the same gain and frequency response to the final output.

You can alternatively develop the input-referred spot noise at the transimpedance stage input with and without the second stage. My example design will begin with a spot-noise assessment to roughly design the second-stage input spot-noise target, but I will then add noise bandlimiting in the second stage to control the broadband integrated noise, and thus control the SNR to the ADC.

While these general concepts apply to any low-noise first stage followed by a second-stage FDA, here I will use a photodiode (or charge) sensor application to demonstrate concepts where the signal is very low current, requiring significant “transimpedance” or resistive gain with low input-current noise. To show a specific design illustrating these noise concepts:

  • Design for a 500pF source capacitance in the detector plus parasitics (cable, board, sensor, etc.) and deliver a total 5MΩ gain in two stages, with an overall third-order Bessel response giving an approximate 200kHz of bandwidth.
  • Assume the full-scale input signal, intended to fill up 90% of the differential full-scale input range of a 12-bit pipeline converter [1] operating at 25MSPS, requiring a maximum 1.9Vpp differential input on a 0.95V common-mode voltage. A 5MΩ gain implies that the full-scale unipolar input current is 1.9Vpp/5MΩ = 0.38µA.
  • Use the most power-efficient single 3V supply solutions in each stage and allocate the gains for the required response. Start with only a gain stage for the FDA; then add the filtering within and after the FDA stage. Target very good DC precision through the channel.


Transimpedance design challenges

Low-noise/low-power transimpedance designs present several challenges. You can resolve many of these challenges with the 1mA, 300MHz OPA838 decompensated voltage feedback operational amplifier (op amp) [2] from Texas Instruments (TI). As reference [3] shows, it’s possible to simplify transimpedance design down to a few equations. Essentially, the noise-gain zero formed by the feedback resistor (gain element) and the source capacitance needs to be compensated to a flat noise gain (capacitor divider) at high frequencies.

Here are a couple of key points not commonly considered:

  • Decompensated voltage feedback op amps are the best devices for a transimpedance design because they give the highest closed-loop bandwidth for the target gain at the lowest power. They also commonly have the lowest input-voltage noise at the lowest quiescent power. Since the noise-gain shape is peaked up to a high level at the loop-gain crossover, most transimpedance designs do not require unity-gain stability in the op amp.
  • In multistage designs, it is best to target a higher bandwidth in the first transimpedance stage before controlling the overall noise with subsequent well-defined filter shapes at lower cutoff frequencies. There is often some variability in the source capacitance; designing for excess nominal bandwidth enables you to control the overall response shape more reliably with the second stage. Also, peaking in the noise gain reduces the loop gain in a transimpedance stage. Designing for higher bandwidth keeps that loop gain higher through the first stage. With a known source capacitance and op amp gain bandwidth product (GBP), targeting a higher bandwidth than necessary shows up as a lower achievable transimpedance gain in this first stage.

With an overall target bandwidth of 200kHz, target a 500kHz nominally flat (Butterworth) response in the input transimpedance stage. Using the following simplifications [3], derive a maximum feedback resistor value for the 500pF source capacitance and 300MHz GBP. For the Butterworth target, the achievable flat bandwidth is the geometric mean of the noise-gain zero and the GBP – working in hertz, shown in Equation 1.


Solving for an Rfmax value to hit a 500kHz closed-loop flat-frequency response with a 500pF source capacitance gives you Equation 2:

Plugging in the numbers results in a 382kΩ maximum gain – round this up to 402kΩ standard value. To hit a Butterworth response, set the feedback pole to 0.707 of the actual geometric mean of the GBP and the noise-gain zero given by Equation 3.


If the feedback pole is set to 0.707*Fo, and after plugging in the numbers with the 402kΩ feedback and 500pF source capacitance Fo = 487kHz, the feedback pole should be targeted at 344kHz. This resolves to a feedback capacitance of 1.14pF using 402kΩ equals Rf. Running an initial bipolar-supply simulation (using the TINA-TI™ software model for the OPA838 and TINA-TI simulation tool) [4], you can see in Figure 1 that this design produces the expected bandwidth almost exactly.

Figure 1 Initial transimpedance design for a 487kHz Butterworth response
Click to enlarge

In the OPA838 model, while simulating the spot output noise (Figure 2), both the low-frequency 1/f noise effects and some peaking at 500kHz are apparent. Equation 4 calculates the total output spot-noise power expression over frequency [3]. The last term is the peaking portion of the noise-gain curve before the pole at (1/2πRfCf) where the 200kHz post-filter cutoff will be used for the f in that last term. This is the approximate frequency of integration for the peaking region of the noise gain.

Figure 2
Transimpedance stage output spot noise

As Table 1 shows, input-current noise is the dominant contributor to total input spot noise, while the peaking portion of the output noise is caused by the input spot-noise voltage of the op amp times its noise gain adds in some portion. Taking just the ib and en terms of Equation 4, you can derive an equality to solve for the frequency at which the voltage-noise term equals the current-noise term (Equation 5). Plugging in numbers for the OPA838 (1.2pA input-current noise, 1.9nV voltage noise) solves to a 200kHz crossover where the output spot noise is clearly rising due to the last term in Equation 4. The filter added to the second stage will cut this noise peaking off.

Table 1 Relative integrated noise-power contributions for the OPA838 transimpedance design

Continue reading on EDN

Leave a comment