Intel Foundry Services roadmap unveiled one deal at a time
Article By : Majeed Ahmad
Intel is cobbling a chip design and manufacturing ecosystem built around EDA tools and IP offerings made available via cloud platforms.
Intel Foundry Services (IFS) is making its technology roadmap apparent with each new deal it signs, and the message is clear: Intel means business. Through these deals and partnerships, the Santa Clara, California-based chipmaker is cobbling a chip design and manufacturing ecosystem built around EDA tools and IP offerings made available via cloud platforms.
Figure 1 IFS is inking deals to create a robust chip design and manufacturing ecosystem for its foundry clients. Source: Intel Foundry Services
The latest announcement aims to cement the foundry business with military, aerospace, and government clients, a low-hanging fruit amid its status as a U.S.-based foundry planning to offer chip manufacturing at smaller nanometer nodes. Besides the unique functional requirements such as radiation hardening by design and wide ambient temperature tolerance, IFS will also offer design support via reference flows and methodologies.
Earlier, in summer 2022, IFS unveiled partnerships with cloud service providers like Amazon Web Services (AWS) and Microsoft Azure to facilitate efficient and secure design environments for its foundry clients. The cloud platform will optimize EDA tools to take advantage of the scalability of the cloud while meeting the requirements of Intel’s process design kits (PDKs). For that, IFS has signed pacts with EDA tool providers such as Ansys, Cadence, Siemens EDA, and Synopsys.
The production-proven design environments in the cloud will also provide access to Intel’s advanced process and packaging technologies. That will shorten design cycles and accelerate time-to-market for chip designers.
IFS is also giving early access to process and packaging roadmaps as well as process design kits (PDKs) to EDA companies like Cadence. That will enable EDA solution providers to fine-tune EDA tools and IPs for Intel’s process and packaging technologies portfolio.
Figure 2 EDA and IP suppliers are crucial in IFS’s bid to build a viable chip design and manufacturing ecosystem. Source: Ansys
Likewise, IFS is joining hands with IP suppliers to reduce design barriers, design risk, and cost for its foundry clients. Take Silicon Creations, an IP supplier for precision and general-purpose timing (PLLs), oscillators, low-power SerDes, and high-speed differential I/Os for diverse applications. Silicon Creations is developing a fractional-N synthesizer as a general-purpose, high-performance system-on-chip (SoC) clocking solution for Intel 16 manufacturing process.
The IP supplier is developing a test chip on Intel 16 and expects to have the IP proven in the third quarter of 2022. That’s how companies developing chips on Intel 16 will benefit from having access to programmable PLL IP with circuit architecture proven on production wafers.
Chip design is an incredibly complex process; it requires software and hardware tools to create the intricate patterns that make up the layout of an IC. IFS is setting the stage for a new level of chip design and manufacturing service by providing access to EDA tools and IP offerings on secure cloud platforms. How this will benefit Intel against entrenched players like GF, Samsung, and TSMC is still to be seen.
This article was originally published on EDN.
Majeed Ahmad, Editor-in-Chief of EDN and Planet Analog, has covered the electronics design industry for more than two decades.
