Mathematical models if circuits and systems give you a head start on developing your products before you're ready to build physical prototypes.
Electronic systems keep getting more complex. Much of the complexity comes from ICs, which can undergo years of design and validation cycles before reaching the market. System design engineering teams evaluate ICs before developing them into systems. IC macro models help system designers understand, simulate, and implement these devices into systems before making any physical PCBs. Doing so cuts cost and time for the system designers while protecting the design IPs of the IC design engineering units. This article explains the need, benefit and market capturing aspects of behaviour model development, especially macro model development, in detail.
A model is the representation of device or system characteristics through mathematical equations, equivalent circuits, diagrams, graphs, or tables along with reasoning, assumptions, approximations and boundary conditions of the region of validity of the model. Behavior modeling can also be defined as the art of approximating designs to the point where it is simplified enough to reduce complexity and simulation times but still maintain the integrity of the input-output characteristics of the system.
Models help us understand the system, which not only saves time and effort in understanding the system; it also provides relevant information etching out the redundant parts that only a designer of the device/system being modelled needs to worry about. Figure 1 shows several models of a typical MOSFET.
In power electronics, we can model a MOSFET as simply a voltage-controlled switch. Used in an analog circuit, the same MOSFET in the saturation region can be modelled (small signal) as a voltage-controlled current source. Neither of these models define a MOSFET. Yet, they can accurately portray the MOSFET’s behavior in those applications.
Analog circuits and systems pose a significant challenge to behavior modelling. In digital systems, we can simply translate the model translated to software.
Need for macro model development
Behavior modelling finds its place in both pre-design and post-design steps of IC development. Behavior modeling is an essential part of engineering design because it helps engineers understand the problem and the remedies required. Modelling also helps with overall system/design performance by describing behaviour in detail even before the design process starts. This helps engineers modify and enhance the design before immersing deep into the design process.
Post-design model development is more common and generally made available to board and system designers. After the test-chip characterization is completed, manufacturers release simulation models. This helps in many multitudes. It’s difficult and expensive for IC manufacturers to distribute sample PCBs to every potential customer. Models, however, are encrypted software/simulator readable files that IC manufacturers can easily distribute.
Another hurdle in sample PCB distribution comes from the fact that designers may not have sophisticated laboratory setups to sufficiently test the PCBs. This is also a potential threat to customer loss and can be easily resolved by sharing encrypted models.
In the case of customer laboratory being a cause, it is impossible to share actual designs with the customer for both IP protection reasons as well as simulation time issues. A full chip post-layout simulation of switch-mode power converter usually takes weeks to run a complete simulation of one test bench. While, the equivalent macro models can be developed this can be simulated in a matter of minutes without compromising the device/IC’s characteristics.
In the case of macro modelling, each IC feature to be modeled can be developed separately and integrated together at the very end. Thus, in the IC model, each parameter modeled can execute itself independently from rest of the model, but this can’t be the case in an physical IC.
Macro model development
Macro modelling deals with developing models for parts or the whole of the IC or system. This is the art of ignoring parts of the system/IC behaviour, keeping in mind what end result is expected and needs to be modelled. Features can be added to make the model more and more realistic. The aim remains to replicate systems input/output characteristics. For example, an op-amp in a switch-mode power supply (SMPS) working as an error amplifier can simply be modeled as a voltage-controlled voltage source with high gain followed by a pole at low frequency. Parameters such as output offset, common-mode rejection ratio (CMRR), power-supply rejection ration (PSRR), and slew rate are of low importance and can be ignored. In case a crucial parameter such as slew rate affects system behaviour, only that parameter need be added. This selective feature modeling also helps reduce simulation time. Creation of test benches to validate the models developed against the silicon results is also an equally challenging task in the case of analog macro model development.
Macro models can be developed for any engineering system to reduce efforts, save time consumption, and protect design intellectual properties (IPs).
Behavioral and Spice macro model development
Figure 2 shows typical open loop DC-DC converter topologies.
Switch mode power converter model development includes DC/DC and AC/DC converter synchronous and asynchronous topologies such as Buck, Boost, Buck-Boost, Inverting Buck Boost, Inverting Buck, Cuk, Sepic, Fly back, Fly buck, half bridge, Full Bridge, Push-Pull converter, PFC (Power factor correction)-Boost and Inductor-Inductor-Capacitor (LLC) along with many others. These topologies are implemented or modelled in both linear and nonlinear closed loop control schemes such as voltage mode control, peak/valley/average current mode control, hysteretic modes and many others. These models can be developed in tools like PSpice, TINA, Simplis, LT-Spice and many others.
SMPS Spice transient model development
SMPS Transient model development includes developing accurate spice models for the switching loop comprising of power switches, error amplifiers, compensation circuits, comparators, latches, oscillators, slope compensation, and other crucial features. Along with the operating loop, other important features such as soft start circuit, fast soft start circuit in case of slower models, driver circuit, peak and valley inductor current limits, under voltage lock out, hiccup along with externally controlled features such as forced continuous conduction, frequency fold back and many others are also implemented.
Any typical DC/DC converter will have the basic blocks such as error amplifier (op-amp or a Gm amplifier), bandgap reference, oscillator, comparator, drivers and power switches along with protection circuits such as current limit, under voltage lock out (UVLO), short circuit protection, etc. These individual blocks of an SMPS are to be modelled to the desired extent and validated separately. Once the stand alone block validations are done the system level integration of individual models is done and system level validations are done with coarse and fine tuning to match the bench results.
The macro models developed are validated against the bench results for test benches including start up, input transients, steady state and load transient behaviours. The macro models developed are also validated for failure cases such as under voltage lock out, current limit and any other failure causes specific to the integrated circuit model being developed.
SMPS steady-state behaviour model development
The other important aspect of modelling for power supply application design and PCB design, is steady-state behaviour model development of switch mode power converters. This includes aspects such as switching frequency models, efficiency models and stability model (transfer function) development and validation. These models are generally developed as a part of design calculator for bill of materials (BOM) generation along with the models stated above in Excel format.
Op-amp and GM amplifier model development
Operational amplifier macro model development includes replicating the op-amp characteristics such as output impedance, open loop gain (AOL), Common mode rejection ratio (CMRR), Power supply rejection ratio (PSRR), claw (variation of VOUT with respect to IOUT), output offset voltage, slew rate, response time, input and output noise, electrostatic discharge (ESD), current limit and other features. These modelled features are validated against the bench results as both individual model units as well as a cumulative op-amp model.
Band-gap reference model development
Band gap reference macro model development includes replicating BGR (band-gap reference) characteristics such as PSRR, line transients, load transients, drop out voltage, line regulation, load regulation, quiescent currents, output impedance, current limit, output voltage noise and input step response. These features modelled are validated against the bench results as both individual model units as well as a cumulative BGR model.
ADC model development
ADC model development includes pin current models, transient simulation models and timing diagram model development. These features modelled are validated against the bench results as both individual model units as well as a cumulative ADC model.
Other macro models
Other macro models developed include motor drivers, gate drivers, LED drivers, LDOs and other electrical integrates circuits with their own unique features and characteristics modelled to meet the device functionality expectations. Macro models for Power switches such as MOSFETs etc. are also developed to the extent of level one to level three spice models. These models need IBIS model development for I/O buffer characterization which includes Current-Voltage characteristics and Voltage-Time characteristics.
Advantages of macro-model development include:
Model development as a crucial part of engineering has been introduced. Need for model development and its advantages have been discussed in detail. Types of behaviour models and their significance have been discussed.
Spice models as a part of release to manufacturing (RTM) criteria to reduce cost in distribution of Evaluation boards and these models can be tested for different test benches with minor modifications without the hassle of redesigning the PCB.