Past studies that have modeled buck converter power losses focused primarily on semiconductor device losses [1-5], and to a lesser extent, passive component losses [1-2], while PCB losses generally and PCB ACR losses specifically have been largely ignored. To estimate these losses, Ansys Q3D is used to extract the PCB main loop AC resistance (ACR) for a typical Vcore driver and MOSFET (DrMOS) application, from which the associated ripple current ACR losses are calculated. These losses increase non-linearly with a decreasing frequency due to the increasing peak-to-peak ripple current, resulting in lower peak efficiency at a higher switching frequency than in the conventional loss analysis prediction.

PCB main loop ACR model, simulation, and measurement
The major power-loss components of synchronous buck converters can be summarized as active component losses (MOSFET DC and switching losses, MOSFET driver losses) passive component losses (inductor DC resistance [DCR], ACR and core losses, capacitor equivalent series resistance [ESR] losses), and PCB losses (PCB, DCR, and ACR losses).

The frequency-dependent PCB losses are due to the sawtooth-shaped ripple current that circulates in the main loop of the converter given by Equation (1):

Where Rac is the frequency-dependent PCB effective resistance of the ripple current waveform.  Vcore DrMOS synchronous buck converters with a relatively large ripple current under peak efficiency operating conditions provide a case to study. To estimate the PCB ACR loss component, a single-phase portion of a multi-phase Vcore PCB power stage layout was imported into Anysys Q3D (Figure 1a). The Q3D simulated AC current distribution in the PCB main loop ripple current circulation path is shown in Figure 1b.

Vcore PCB main loop structure model simulation
Figure 1
Vcore PCB main loop Q3D structure model (a) and AC current simulation (b)

The Q3D frequency-dependent resistance extraction closely matches the board level LCR measurement shown in Figure 2. Additionally, the PCB frequency-dependent resistance reasonably follows the ideal skin effect model shown in Equation 2:

The effective ripple current resistance (Rac) for the power stage sawtooth waveform power loss calculation is estimated by weighted Fourier analysis applied to the 15% duty cycle triangle wave, resulting in an equivalent power loss calculation ACR approximately equal to 1.1 times the simulated fundamental switching frequency component ACR.

Figure 2
Simulated and measured Vcore PCB main loop frequency dependent resistance (ACR)

Total converter loss model vs. measurement
The total switching loss measurement was made on a single-phase Vcore DrMOS evaluation board utilizing the recommended 150nH inductor at the typical operating conditions of Vin = 12V and Vout = 1.8V with the resulting peak-to-peak ripple current (Ipp) ~14.5A at 700kHz. The power losses of the converter at 15A load current were analyzed over the frequency range of 400kHz to 2.5MHz with loss components extracted at 700 kHz (figures 3 and 4).

MOSFET losses were estimated by a combination of device measurement and simulation. Inductor winding ACR loss was based on Q3D simulation, while inductor core losses and DCR losses were estimated based on the supplier's datasheet. Output polymer tantalum solid capacitors (POSCAP) ESR loss was extracted based on the measured power loss difference replacing the POSCAPs with ceramic ones. PCB ACR loss was derived from the Q3D frequency dependent analysis described above. The PCB ACR loss accounted for ~25% of the ripple current resistive losses and ~5% of the total loss at the peak efficiency operating frequency of 700 kHz.

Figure 3
Vcore DrMOS power loss constituents at 700 kHz

The overall power loss can be expressed in Equation 3:

Where A is the DC power loss, B × f is the proportional-to-frequency MOSFET switching power loss, and C × f −1.5 is the ripple current resistive power loss. When solving for the minimum overall power loss, the peak efficiency frequency is found when the proportional-to-frequency MOSFET power loss equals 1.5 times the ripple current power loss. This crossover occurs at approximately 700 kHz for the Vcore DrMOS operating conditions under study (Figure 4).

Figure 4
Vcore DrMOS power losses vs frequency

Main-loop ripple current PCB resistive losses can be a significant loss component, limiting peak efficiency substantially below conventional analysis estimation methods. These losses can be reasonably estimated using Q3D resistance extraction for improved efficiency versus frequency estimation. The peak efficiency operating frequency is found to be higher than without including the PCB ACR loss factor. Owing to the monolithic integration of drivers and MOSFETs, Monolithic Power Systems DrMOS devices are inherently capable of higher frequency operation to mitigate this loss factor.

Eric Braun is staff scientist, Chiahsin Chang is senior manager of technical marketing and applications engineering, Huaifeng Wang is technology integration supervisor, and Jinghai Zhou leads the engineering team for the computing product line, all at Monolithic Power Systems.


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