These techniques will lower the switch-node ringing without paying an efficiency penalty in synchronous buck converters.
High-current, point-of-load (POL) buck converters leverage metal-oxide semiconductor field-effect transistors (MOSFETs) to provide the pulse-width-modulation (PWM) pulse train to the output filter. The layout of the buck converter power-stage components will directly affect the magnitude of the ringing on the switch node, which if not properly controlled can have an adverse effect on power-supply emissions, efficiency and component stress.
In the Analog Design Journal article, “Controlling switch-node ringing in synchronous buck converters,” Robert Taylor and I investigated several ways to reduce switch-node ringing by slowing the switching of the high-side MOSFET or dampening the switching waveform through a snubber circuit. Both of these techniques induce extra losses in the buck converter. Here, I will cover additional techniques to lower the switch-node ringing without paying an efficiency penalty.
First, it is important to understand the causes of switch-node ringing. In order to prevent shoot-through currents in buck converters, buck controller integrated circuits (ICs) provide a dead time between one MOSFET turning off and the complementary MOSFET turning on. During this dead-time period, when neither MOSFET is on and the inductor current is positive, the inductor current commutates through the low-side MOSFET body diode. The transition from the body diode conducting to the high-side switch turning on results in a forced commutation of the body diode from a conducting to a nonconducting state, and a large diode reverse-recovery current ensues.
Figure 1 illustrates a buck converter with additional parasitic inductances in the input capacitor, MOSFET packages and circuit layout. The reverse-recovery current through body diode D1, which increases with faster switching speeds of the control FET and with temperature, energizes the parasitic inductances during forced commutation by E = ½* LI2. This energy creates a resonant tank between the parasitic inductances and capacitances on the switch node. Ultimately, this appears as overshoot and ringing at the switch node.
Figure 1 Buck converter with parasitics.
Circuit designers should make every effort to minimize inductances in the high-current path between the input capacitor, high-side FET, low-side FET and ground return to the input capacitor. Figures 2 through 7 show the importance of input capacitor location. The power supply under test is a 12V input, 5V output at 5W buck converter. Locating the input-voltage decoupling capacitor far away from the MOSFETs (as shown in Figure 2) instead of close to the IC (as shown in Figure 3) creates a large loop inductance. Consequently, the switch-node ringing increases by 12%, the output ripple increases by more than 100% and the peak electromagnetic interference (EMI) increases by 5dBµV.
Figure 2 Buck converter with large decoupling area.
Figure 3 Buck converter with small decoupling area.
Figure 4 Buck converter switch node with large decoupling area.
Figure 5 Buck converter switch node with small decoupling area.
Figure 6 EMI peak with large decoupling area.
Figure 7 EMI peak with small decoupling area.
Table 1 Comparison of large and small decoupling areas
SW max (V)
Vout p2p (mV)
EMI peak (dBµV)
Not only is input capacitor placement important, but both the type and size of the capacitor play important roles. Ceramic capacitors are popular for a buck converter’s input decoupling due to their low equivalent series resistance (ESR) and ability to handle pulsating, high root-mean-square (RMS) currents. Polymer or aluminum capacitors can support the ceramics for voltage hold-up on the input bus, but don’t rely on them to support the load current and inductor ripple current. These capacitors have higher ESR and equivalent series inductance (ESL), which limits the current handling. SPICE simulations, or Texas Instruments’ Power Stage Designer 4.0, can calculate current sharing between different types of input capacitors.
You also need to consider the package size of the ceramic decoupling capacitors. The ESL of ceramic capacitors is proportional to the device length. For example, Figure 8 shows the parasitic elements of capacitors with two different package sizes, the 0201 and 0603. The 0201 is 0.6mm in length and has an ESL of 239pH; the 0603 package capacitor is 1.6mm in length and has an ESL of 494pH.
Figure 8 Parasitic elements of 0201 and 0603 1500pF capacitors.
The ESL values in these capacitors, even under 1nH, will have an impact on ringing in the buck converter. Figures 9 and 10 show the switch-node ringing of the same buck-converter circuit with two 1500pF 0201 capacitors and two 1500pF 0603 decoupling capacitors. The peak ringing with 0201s is 22.8V, while the peak ringing with 0603s is 25V.
Figure 9 Switch-node ringing with 0201 input decoupling.
Figure 10 Switch-node ringing with 0603 input decoupling.
A buck converter is very sensitive to the parasitic inductances in the high-current path between the input capacitors, half-bridge MOSFETs and return path to the input capacitors. You can minimize these inductances by locating the input decoupling capacitors as close as possible to the drain-to-source of the FETs and by using appropriately-sized ceramic capacitors. Good layout and component selection will enable you to minimize switch-node ringing and allow better EMI performance.