The VersaClock 3S clock generators from IDT meet requirements for standards such as PCI Express Gen 1/2/3 and are aimed at consumer, industrial, computing and automotive applications.
Integrated Device Technology (IDT) has rolled out a line of programmable clock generators that promise deliver novel power-saving features while saving board space by removing the need for multiple discrete timing components. Providing low power and low jitter scalability, the VersaClock 3S devices meet requirements for widely used standards such as PCI Express Gen 1/2/3 and are aimed at consumer, industrial, computing and automotive applications, detailed the company.
The 5P35023 and 5P35021 claim to be the world’s first intelligent timing devices to detect power down status of the downstream clocked component, resulting in further energy savings in the system. In addition, they flaunt a user-friendly interface allowing users to easily minimise power consumption based on targeted performance. Moreover, the devices are supported by one-time programmable (OTP) memory that provides the system the ability to dynamically switch between up to four programmed frequencies, allowing optimised performance and power consumption. Also, they feature the overshoot reduction technology that prevents unwanted frequency overshoot that can lead to system failures during fast frequency changes.
The devices have an extremely low-power digitally controlled oscillator supplying the system with a low-power 32.768kHz clock output with less than 2μA current consumption for use as a system RTC reference clock, targeting handheld and battery-powered applications.
The VersaClock 3S 5P35023 has three single-ended LVCMOS outputs and two differential outputs that support LVPECL, LVDS, LP-HCSL and single-ended LVCMOS. The 5P35021 has one single-ended LVCMOS output and two differential outputs.
The 5P35023 is available in a 4mm x 4mm 24-QFN package, and the 5P35021 is available in a 3mm x 3mm 20-QFN package.