Power Management for FPGAs

Article By : M. Di Paolo Emilio

In today's super-competitive markets, the relevance of FPGA and ASIC devices has grown enormously since the functionality of several new systems depends on those components.

In today's super-competitive markets, where electronic subsystems are subject to increasing time-to-market pressure, the relevance of FPGA and ASIC devices has grown enormously since the functionality of several new systems depends on those components. One of the most critical factors of an FPGA-based system is power management. To correctly power an FPGA, a careful analysis of the overall system is necessary; the same technique can most of the time be used when an ASIC chip is used. The performance of the power supply is extremely important due to the different conditions that occur during the power-up (turn-on), the transient behavior, the actions performed during the shutdown phase (turn-off), and other relevant situations. Filtering the supply voltages at the device also requires attention, especially concerning the specific application.

An FPGA device often represents the central core of a system, and for this reason, it must interface with many other components, possibly using different serial or parallel I/O standards and different voltage values.

In electronic equipment with a high level of complexity, the power supply stage supplies only one or at most two voltages while, often, more levels are required. Not only: there are a series of electronic devices (memories) that have a very low power supply voltage. Using the main power supply stage to supply these voltages too would mean using tracks, often long, with consequent voltage drops and a noticeable increase in noise.


The input power (Vin) to the FPGA is usually derived from a backplane or an intermediate voltage line. The value of the input voltage can be considered as the first factor to select among the possible solutions, as each regulator requires a specific minimum value of the supply voltage to operate correctly.

The main function of a regulator consists of keeping the output voltage constant as the input voltage and the current absorbed by the loads. The combination of input voltage, output voltage, and current will force us to choose the type of regulator to use. A regulator regulates the output voltage by comparing the reference voltage to a fraction of the output voltage which appears at the feedback pin.

The reference voltage usually corresponds to the minimum achievable value of the output voltage. Some controllers are characterized by a minimum conduction time, and this feature limits the ability of the regulator to operate correctly if the ratio between the input voltage and the output voltage assumes high values. The minimum ON time (TON min) of the controller also sets the minimum output voltage achievable at a specific operating frequency. If for any reason, the minimum conduction time is exceeded, the output voltage will also rise beyond the desired value.

The use of higher switching frequencies allows the designer to use small inductors and small output capacitors, thus reducing the ripple voltage and at the same time, facilitating the design of high-bandwidth systems. The value of the operating frequency has a direct impact on some critical parameters that include the size of inductors and capacitors, efficiency, ripple voltage, and finally, the size of the area occupied on the PCB.

Efficiency is the ratio between the output power and the input power to a given system and is an index of the wasted power. In any case, we have to consider the power dissipation, which becomes the parameter to be controlled. The power dissipated in a system has a direct impact on the temperature increase of all the components such as integrated circuits, power devices, capacitors, and inductors. In some cases, we will have to focus our attention on particular areas to correctly assess the temperature difference.

The need to reduce the footprint or the height of the design can have a serious impact both on the costs and on the efficiency of a specific product. The use of a multilayer printed circuit certainly contributes to a size reduction, but it increases the overall cost of the system. Some designers may think to increase the switching frequency, thus reducing the size of the components. However, the increase in frequency causes an increase in switching losses and the consequent worsening of efficiency. Therefore, an unnecessary reduction in the size of the board causes an unjustified increase in costs and forces us to minimize the power dissipated to guarantee the correct thermal management of the system.

The voltage that powers the FPGA core is subject to wide current variations characterized by extremely high slew-rates. This requires the controller to be able to deliver large step-load current while minimizing variations in its output voltage. The ability of the controller to respond to these sudden load changes is represented by the transient response, which depends directly on the bandwidth of the control loop and the ESR value of the output capacitor.

Renesas has DC / DC controllers compatible with the standard PMBus bus, which provide a Single Point Of Load (POL) conversion output suitable for powering FPGAs, DSPs, ASICs, Network Processors, and general-purpose power systems. The ISL68300 device, which integrates the MOSFET drivers, and the ISL68301 device, with PWM outputs, simplifies the design of power supplies for data centers, and for wireless communications systems as well as the design of power supplies for industrial automation systems. In the same way, ADI's ADM1266 allows simple and flexible management of complex power supply systems for FPGAs, ASICs, processor boards in network routers and switches, servers, and data storage systems. The ADM1266 integrates an analog-to-digital converter (ADC) and nine digital-to-analog converters with voltage output (DAC) that regulate the feedback node or the reference of a DC / DC converter to implement an autonomous closed-loop margin system (Figures 1 and 2).


Figure 1: power management application circuit with ISL68300


Figure 2: block diagram of ADM1266


The optimal configuration of the power supply system varies according to the system requirements and its complexity, as well as the possible use of FPGA or ASIC. Applications that use FPGA may require numerous calculations to be performed on large amounts of data, so the workload is not always deterministic, and the power supplied to the device can be changed suddenly. Sudden switching causes transient phenomena, which is why the power supply should have extended feedback bandwidth to ensure a quick recovery. An ideal power supply should be able to perform these tasks using as few bulk and output capacitors as possible.

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