Qormino: A compact, multicore processing system solution

Article By : Rajan Bedi

The Qormino multicore processing solution delivers high-throughput GHz performance in a compact, plug & play form-factor with availability guaranteed for up to 15 years.

Qormino is a high-performance, 64-bit, multicore processing system solution based on NXP’s QorQ communication processor. Teledyne e2v has integrated 4 GB of DDR memory onto a single substrate resulting in an ultra-compact, high-performance form factor.

Qormino is suitable for high-throughput, Hi-Rel. Products will range from two, four, or eight PowerPC or ARM cores with various memory and peripheral options.

Figure 1 Qormino T1040-4GB quad 1.4 GHz PowerPC cores, 4 GB processing memory solution

The solution solves two major issues for embedded applications: the need to connect fast, large off-chip storage to a processor and managing memory obsolescence. Integrating off-chip memory with a multicore processor onto a single substrate removes the need to design this complex, timing-critical interface, delivering significant size, weight, and power (SWaP) advantages. Combining these also reduces time-to-market, allowing users to focus on the higher-level system architecture.

Advances in memory technology outpace successive processor generations with semiconductor manufacturers rapidly migrating to smaller nodes to remain competitive for consumer product cycles. To prevent supply-chain problems for users with long-term needs, Teledyne e2v is guaranteeing availability for up to 15 years in commercial, industrial, and military grade from −55 to +125°C. Plastic parts can be screened targeting NASA’s qualification flow, from levels 1 to 3.

Teledyne e2v’s Semiconductor Lifecycle Management (SLiM) program guarantees its customers supply longevity and prevention against counterfeiting by centrally managing a secured supply of the original manufacturers IP. A protected bank of wafers is stored and matched to a client’s lifetime demand profile with packaged, tested, and characterised parts available in the future.

The first Qormino device sampled in 2015 integrating NXP’s T1040 QorQ advanced multicore processor (four 64-bit, e5500 PowerPC cores each containing 256 KB L2 caches) with 1 GB of memory to prove and de-risk the original product concept.

The current offering is the QT1040-4GB, combining the T1040 with 4 GB of external DDR4 memory (total of 72 bits) with 8 bit ECC protection for Hi-Rel applications. To allow connection to external ASICs/FPGAs, peripherals include two USB 2.0, two DUART, four I2C, four GPIO supporting up to 109 signals, SD/eSHDHC/eMMC, eSPI, DIU, PCIe 2.0, SATA, SRIO and GbE interfaces, as well as eight 5 GHz SERDES lanes as illustrated below.

Figure 2 Qormino T1040 block diagram

The T1040 contains four 64-bit e5500 PowerPC cores with each benchmarking at 3 DMIPS/MHz and a maximum power dissipation of 7 W. The architecture comprises 32 KB instruction and data caches combined with a 256 KB L2, as well as a common 256 KB L3 cache. The T1040 integrates 4 GB of DDR4 memory with ECC protection in a form factor measuring 44×26 mm as shown below.

Figure 3 Qormino QT1040-4GB integrating 4GB of DDR4

The second Qormino device is the QLSLS1046-4GB (based on NXP’s QorQ Laverscape processor), integrating a quad ARM Cortex A72 processor with 4GB of external DDR4 memory with 8-bit ECC. Each core contains 32 KB instruction and data caches as well as a combined 2MB L2. To allow connection to external ASICs/FPGAs, peripherals include three USB 3.0, two DUART, six UARTs, four I2C, GPIO, eSPI, QSPI and DMA interfaces, as well as eight 10 GHz SERDES lanes as illustrated below.

Figure 4 Qormino QLS1046A-4GB block diagram

The Qormino multicore processing solution delivers high-throughput GHz performance in a compact, plug & play form-factor. Devices are targeting NASA’s qualification flow.

In terms of roadmap and specific customer variants, Teledyne e2v will complete its Qormino portfolio by offering solutions containing two to eight embedded cores, NXP T-Series PowerPC and Laverscape ARM architectures, with integrated memory options up to 8GB. Lead times range from six to eight months.

Until next month, the best example of how die shrink has adversely impacted your space-electronics design will win a Courses for Rocket Scientists World Tour t-shirt. Congratulations to Sandra from Spain, the first to answer the riddle from my previous post.

Dr. Rajan Bedi is the CEO and founder of Spacechips, which provides on-board processing products, design consultancy in space electronics, technical-marketing, training and business-intelligence services to the global space industry. Three-day courses on space electronics will be held in Madrid, Spain this September and Los Angeles in November.

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