Why power-aware signal integrity analysis matters in DDR5 design
DDR is used on many of the interfaces in computer systems, one of which relates to the way the processor…
Automated validation of multiple clock signals in SoC designs
The complexity in clocking subsystems in SoC designs is paving the way for automation to validate multiple combinations of clock…
Cloud the new frontier for EDA
Under the competitive pressures of the semiconductor industry, chip designers are choosing to migrate to cloud computing technologies.
Rule of thumb or layout automation for analog floorplan
Creating the right floorplan for IoT chips is a critical task that must evolve and be refined as the project…
Mouser celebrates 1 million customer downloads of ECAD models
Mouser Electronics' engineering customers have collectively downloaded more than 1 million models using the ECAD resource on mouser.com.
DesignSpark integrates SnapEDA to help engineers design electronics faster
The new SnapEDA search capability on DesignSpark provides engineers with millions of free CAD models, helping them design electronics faster.
FPGAs for SoC design verification
Using FPGAs to verify the SoC design is a powerful tool and is becoming a very important part of semiconductor…
Creating and decomposing a DRC-compliant design for SAMP processes
Creating and decomposing a DRC-compliant design for self-aligned multi-patterning processes is not a trivial matter.
EDA breakthroughs needed to conquer evolving SoC design challenges
As system complexity continues to rise, breakthroughs are needed if EDA is to keep ahead of SoC design challenges.
Association aims to elevate the role of PCB design
PCBs starting to get engineering treatment