555 timer design consumes zero current in quiescent mode
In this design, a classic 555 timer IC consumes zero current in its quiescent mode and wakes up quickly in…
Vaccination program architecture provides lessons for data processing
A vaccination program shows how a pipeline/parallel hybrid architecture can provide lessons that apply to data processing as well.
Chip designer Jim Keller’s journey spans 4 semiconductor architectures
Here is a chronicle of chip designer Jim Keller’s journey, which spans four semiconductor architectures: x86, PowerPC, MIPS, and Arm.
CES panel tracks RISC-V’s journey to commercial processors
A panel discussion took a closer look at the RISC-V and processor design areas and how it’s creating a healthy…
Generating track masks for SAMP processes
Learn the decomposition requirements for generating track masks for SAMP processes while complying with all relevant DRC.
DDR4 will enable new applications in the satellite industry
DDR4 will allow the satellite industry to offer higher-throughput on-board processing and increased acquisition times to enable new applications.
A brief history of Intel’s memory business
Intel’s departure from the NAND flash business is somewhat reminiscent of its exit from the DRAM market in the 1980s.
Ovonic threshold switching leads to breakthrough in memories
Ovonic threshold switching combines the phase-change memory element with an OTS selector device, both based on a chalcogenide material.
AMD acquiring Xilinx to boost data center offerings
AMD is reportedly acquiring FPGA design house Xilinx to boost its server and data center chip offerings.
10 basic terms for advanced IC packaging
Here is a brief synopsis of the 10 most common terms used in advanced IC packaging technologies.