2022-11-07 - Majeed Ahmad

2D material breakthrough brings TSMC closer to 1nm

TSMC is setting up a new 1-nm chip production facility that will be located in an industrial park in Longtan…

2022-10-27 - Majeed Ahmad

Intel Foundry Services roadmap unveiled one deal at a time

Intel is cobbling a chip design and manufacturing ecosystem built around EDA tools and IP offerings made available via cloud…

2022-10-26 - Cadence Design Systems Inc.

Cadence design flows now certified for TSMC’s latest N4P and N3E processes

TSMC has certified Cadence's digital and custom/analog design flows for the latest N4P and N3E processes.

2022-09-26 - Ryan Chen

Managing changing IP in an evolving SoC design

IPs undergo multiple revisions due to evolving specifications and managing these changes as the SoC design evolves can become a…

2022-09-19 - Majeed Ahmad

Google joins NIST in a bid to democratize chip design

NIST and its university partners will design chips that Google will help manufacture on 200mm wafers at SkyWater's fab in…

2022-09-09 - Brent McDonald

How parasitics create an unexpected EMI filter resonance

The EMI filter resonance can affect conducted emissions, as shown in the design example of parasitics in an EV onboard…

2022-08-26 - Majeed Ahmad

The truth about SMIC’s 7nm chip fabrication ordeal

Can China's top fab SMIC mass produce chips at its newly developed 7nm node? The blog attempts to answer this…

2022-08-24 - Majeed Ahmad

A closer look at TSMC’s 3-nm node and FinFlex technology

TSMC is on track to launch the much-awaited 3nm process node in September, and Apple will be its first 3nm…

2022-08-16 - John Min

Optimizing PPA with RISC-V custom extensions in TWS earbuds

A look at using custom extensions in a RISC-V processor to enable power, performance and area optimized true wireless stereo…

2022-08-02 - Majeed Ahmad

Intel: Trouble in the IDM 2.0 paradise?

Intel CEO Pat Gelsinger has a big job ahead of him, and his vision of IDM 2.0 alone won't cut…