2023-10-27 - Marisol Cabrera, Marlon Eguia, Robert Torrent, and Tomas Hudson, Monolithic Power Systems

Optimizing capacitance in power delivery network (PDN) for 5G

Here is how to achieve efficient PDN design while reducing parasitic impedance caused by current path in decoupling capacitors.

2023-10-11 - Raghu Nathadi

Design challenges in powering automotive SoC core rails

Here is how to implement a power architecture with single-stage or two-stage power conversion.

2023-10-02 - Andrew Cheng and Lion Huang, Monolithic Power Systems

Predicting VDS switching spike with SPICE simulation

This article discusses the effect of parasitic inductance on the VDS switching spike while showing how to prevent an avalanche…

2023-06-27 - Albert Rodriguez, Miguel Ángel Sánchez, and Tomas Hudson, Monolithic Power Systems

Optimizing SOC accuracy in BMS designs

One of the most important parameters for a battery management system (BMS) is the accuracy of its state-of-charge (SOC) estimation.

2023-05-11 - Marisol Cabrera, Tomas Hudson, and Marlon Eguia, Monolithic Power Systems

Predictive transient simulation analysis for the GPUs

Here is how to use the SIMPLIS simulator to predict and optimize the behavior of power supplies for the next…

2022-12-05 - Carmine Fiore and Serge Reymond, Monolithic Power Systems

Resolution explained for magnetic angle sensors

Here is how to meaningfully define resolution and bandwidth, determining factors in magnetic position sensor performance.

2022-02-21 - Tomas Hudson and Cristian Pineda, Monolithic Power Systems

A comparison of interleaved boost and totem-pole PFC topologies

Three topologies are commonly used in power supply designs: Interleaved boost PFC, bridgeless totem-pole PFC and interleaved totem-pole PFC.