Here's a quick overview of what design engineers need to know about making analog-to-digital converters (ADCs) work as expected in a system.
We’ve discussed the idea of makers buying the right analog-to-digital converter (ADC), with resolution a big part of the decision. Most applications don’t need 32-bit precision; but applications like high-definition audio, test instrumentation and digital scaling do. Want to know what those bits from that 32-bit ADC do? Here’s a quick overview of what makers need to know about making these parts work as expected in a system.
First, let’s look under the hood of a precision ADC. Flash and pipeline ADC architectures concentrate on speed but run into limits at around 16 bits of resolution. Successive approximation register (SAR) trades speed for better resolution. SARs operate on the principle of converging a DAC until the A/D input level matches. The SAR ADCs commonly extend to 24 bits, with a handful pushing to 32 bits, but they tend to chew up power.
A few other architectural features come with a delta-sigma part. Care goes into the gain stage before conversion to increase dynamic range and keep noise low. Also, the amount the signal changes between samples must stay small. The preferred approach for minimizing delta is massive oversampling, at hundreds or even thousands of times higher than Nyquist rates. Filtering and decimation bring the readings back to the desired sample rate but add large latency. Often, an auxiliary conversion channel minus the oversampling latency offers lower resolution, like 22 or 24 bits. Advanced noise shaping techniques can lower the noise floor even further.
Here is how oversampling and noise shaping work in data conversion.
Even on a good day, it’s not really 32 bits
It should be no surprise that even though the datasheet says 32-bit, that’s not how many bits one gets. In fairness, losing a few bits to dynamic range and noise is a phenomenon in most converters starting at 16-bit resolution and up. For a 32-bit converter, the theoretical dynamic range is about 194 dB. No physical sensor or analog front-end provides this much; real devices end at about 130 dB. Noise comes in on top. As discussed in previous blogs, Gaussian noise can be cut by oversampling and averaging, which are usually built into the 32-bit delta-sigma part.
Thumbing through some datasheets shows state-of-the-art 32-bit delta-sigma ADCs can deliver as many as 27 bits at single-digit sample rates with heavy oversampling and filtering. Effective bits roll off some as sample rates increase, which may be an important consideration in a system design. Still, a 32-bit part is probably an improvement over the effective resolution a 24-bit ADC could provide in similar noise conditions.
The real question is whether the perceived end user experience can be any better with more resolution of the ADC. For more bits to be useful, resolution and dynamic range must be preserved end-to-end. For example, digitizing audio at 32 bits and playing it back at less than that defeats the point. Rick Rubin has made a fortune compressing recording range for anemic MP3 players and earbuds. Only audiophiles noticed the sound difference.
Yet, 32 bits come along for the ride
I’ll save the vitriol on MP3 formats for another time. Say one can afford a 32-bit ADC and more effective resolution fits the experience in an application. After sampling, there are 32 bits to deal with in digital processing. It’s a good thing that fast 32-bit microcontrollers with Arm or RISC-V cores are now common.
For any algorithm running on 32-bit data, like correlation or estimation filters, integer math becomes a problem. Fixed-point overflow and clipping tear away effective resolution and add digital distortion. Floating point is the way to go, and many 32-bit MCUs have hardware floating point capability. Be careful, though; single-precision floating point with its 23-bit mantissa may still clip results. Double precision 64-bit floating point solves the issue. Combined with 64-bit memory fetch in hardware and high-level math library support in C or Python, even complex algorithms can run fast.
Many 32-bit delta-sigma converters can run up to audio sample rate ranges. Because delta-sigma parts have analog memory and big latency, multiplexing inputs at faster sample rates gets messy. The best application scenario for 32-bit delta-sigma parts may be very low sample rates with aggressive oversampling. There’s also an argument for not being the weak link—digitizing more bits may help algorithms blend many samples into a more precise result. The incremental cost of getting those bits from that 32-bit ADC may be worth it with some attention to the details.
This article was originally published on Planet Analog.
After spending a decade in missile guidance systems at General Dynamics, Don Dingee became an evangelist for VMEbus and single-board computer technology at Motorola. He writes about sensors, ADCs/DACs, and signal processing for Planet Analog.
New products & solutions, whitepaper downloads, reference designs, videos
Register, join the conference, and visit the booths for a chance to win great prizes.