TSMC 7nm ready to go, but Samsung still years away

Article By : Rick Merritt

Both foundries want to make the case they are at the leading edge of next-gen foundry services. Unfortunately they diverge on what they will call 7nm.

Samsung and TSMC have given two very different glimpses of their work on 7nm process technology at the recent International Solid State Circuits Conference (ISSCC). Both companies presented work on SRAMs, typically a key driver for next-generation nodes.

TSMC’s paper described a test chip that could pass for a commercial part and said it had “healthy” yields. Samsung described its use of extreme ultraviolet (EUV) lithography to repair what was clearly a research device, suggesting what it will call 7nm could still be years away.

Both papers need to be viewed through the lens of ISSCC, a gathering place for some 3,000 upwardly mobile chip designers from around the world. Both foundries want to make the case they are at the leading edge of next-generation foundry services. Unfortunately they diverge on what they will call 7nm.

TSMC has apparently won the lion’s share of Apple’s iPhone SoC business, which requires slight improvements in process technology every year. Thus, TSMC started making in volume 10nm chips this year for the iPhone 7 and needs to ramp 7nm chips for the iPhone 8 next year.

Without Apple’s business, Samsung can afford to step back from the name game to some extent. Thus, it will put off its 7nm node but show leadership by being among the first to use, in some form, EUV.

Both companies are making admirable advances. One analyst recently said the foundries are essentially leapfrogging each other and chip giant Intel.

But details are scarce. At ISSCC, TSMC described a 256Mbit SRAM test chip using its 7nm process to hit a bit-cell area of 0.027mm2, making it the “smallest SRAM be in risk production this year,” said Jonathan Chang, director of TSMC’s memory group, in his talk.

The resulting SRAM macro will be 0.34x smaller than TSMC’s 16nm version. It uses seven metal layers and has an overall die size of 42mm2.

The key detail from Chang's talk is this SRAM is almost fully baked. “We are able to yield it right now, with a very, very healthy Vmin…that meets out design targets,” he said.

[TSMC 7nm SRAM (cr)]
__Figure 1:__ *TSMC’s commercial SRAM will be in risk production this year. (Source: ISSCC)*

Samsung describes a limited job for EUV

Samsung’s advance is more research and less development. The South Korean giant built an 8Mbit test SRAM, really just a slice of a future commercial 7nm offering.

[Samsung 7nm SRAM 01 (cr)]
__Figure 2:__ *Samsung provided a concept image of how its 7nm SRAM (top) will be 30% smaller than its 10nm SRAM (bottom).*

The chip was not built with EUV per se. Rather, Samsung developed a novel repair process which it tested on both existing and EUV steppers and—no surprise—found that EUV was much better. Generally, repair is not a production process, so the work says little about how Samsung is doing gearing up for EUV production at 7nm.

Experts generally believe EUV will be ready for production use on some critical layers probably about 2020. Samsung said late last year that it will use EUV in its 7nm process but didn’t say how limited that use might be.

Whether Samsung wants to trail TSMC in a so-called 7nm process by one, two or three years remains to be seen. It can decide at any time, and then define its use of EUV accordingly. And it will have the marketing leverage of saying its 7nm process is more advanced because it uses EUV.

Leave a comment