The article describes the theory, test bench, and methods for checking channel-to-channel isolation of high-speed A/D converters.
Isolation or crosstalk can be a misrepresented metric in radar, satellite and test and measurement applications, which use high-speed converters and several converter channels. Without channel crosstalk taken into consideration, the potential of missing pertinent information in the frequency spectrum could prove devastating to a system, as a spur or noise may show up in the application frequency band of interest.
This article describes the theory, test bench, and methods for checking the channel-to-channel isolation of high-speed analog-to-digital converters (ADCs).
Defining channel crosstalk
Channel-to-channel crosstalk or isolation testing can determine how much attenuation is visible from a corresponding ADC or channel(s) if multiple converters are in one package or reside on the same system board. In theory, the channels are distinct and separate, but at a high frequency, RF signals can and often do couple through various adjacent circuitry, causing interference with the ADC channel in use.
Simply put, crosstalk is the measured signal (error spur) on the converter channel in use—with or without its own signal present—relative to the adjacent converter channel being driven with an RF signal, which is typically called the interferer channel. Crosstalk is the measure of this error spur in decibels relative to full scale (dBFS).
Channel crosstalk can manifest from a poor IC layout if multiple ADCs are in one package, or from a poor PCB layout if multiple ADCs are located on the same system board. So, every IC and PCB layout requires care. Still, it’s not possible to eliminate crosstalk altogether because an interferer channel’s RF signal is always present at some level in the frequency spectrum.
Setting up crosstalk hardware
An evaluation module enables the connection of analog input signals, power, clocking, and digital interfaces to capture digital outputs and program an ADC’s register writes through the serial peripheral interface (SPI) to evaluate the converter in different configurations or activate certain features. Additionally, you can connect an evaluation module to a data-capture board and use a software-based graphical user interface (GUI) to capture, measure, and evaluate the performance metrics of an ADC.
Figure 1 illustrates a setup at the component level using a dual-channel ADC evaluation board. It’s a very simple test case looking only at potential crosstalk on one resident channel.
Figure 1 The block diagram shows a detailed setup of crosstalk testing and measurement. Source: Texas Instruments
The data-capture card typically has separate connections for both power and USB communication, which enables it to communicate with the HSDC Pro data-capture software.
We recommend always reading the evaluation module user guide in order to ensure that all proper connections and power-supply voltages have adequate current to support the entire setup.
Since we are using a dual-channel ADC for this test, there is only one signal generator injecting a signal (interferer) into one of the ADC’s channels, leaving the other ADC channel open and terminated. In the case of a multichannel converter with four or more ADCs, this alone would not be enough for a complete and thorough test. You would need N-1 additional interferer signal sources, where N is the number of channels on the board. You could drive any combination of channels in order to understand the influence of crosstalk on the open channel(s) with the same or different signals.
Regardless of the number of channels, all converters will need a separate signal source or clock source with low phase noise and low harmonics in order to drive the sampling clock appropriately and meet the datasheet performance. Most signal sources require filtering on both the clock and analog inputs. Even lower phase noise-type signal sources still have spurious artifacts that can corrupt either input source. In Figure 1, both signal sources to the analog input and sampling clock input use a band-pass filter to reject all but the specific test frequency.
If coherent sampling is required, a locked reference signal may also be necessary to further synchronize all sources. Most signal sources have a 10-MHz reference on the back of the signal generator, which you can tie to multiple sources in order to keep them phase-locked. You may need to enable the reference lock feature on the front panel of the signal generator itself.
Again, we recommend that you review the ADC user guide for relative frequencies and amplitude levels, and make sure that all proper signal connections are connected to their appropriate connector.
Figure 2 depicts a simple block diagram of the basic components or stages when testing crosstalk.
Figure 2 The block diagram shows the basic setup of crosstalk measurement testing. Source: Texas Instruments
First, apply a filter to the interferer tone on Channel 1 and measure the input captured as a reference. This filter ensures that all other noise and harmonics from the signal generator are attenuated enough to not corrupt the intentional interferer signal applied (Figure 3).
Figure 3 Here is the view of Channel 1 interferer with a –1 dBFS input signal at approximately 1 GHz. Source: Texas Instruments
After setting the interferer signal for the appropriate amplitude level (–1 dBFS in this case), measure the adjacent channel, Channel 2, with no signal applied. This is typically called the “open” channel, as shown in Figure 4. The interferer tone should show up incidentally at the same fast Fourier transfer bin or point as Channel 1’s applied input signal frequency, albeit at an attenuated level. This is the error spur.
Figure 4 Channel 2 is the affected channel with noise floor and crosstalk; error spur is present at approximately 1 GHz. Source: Texas Instruments
Make sure to connect a 50-Ω terminator adapter to the channel’s input connector, or provide some means of termination for the channel so that it’s not corrupted by other unwanted signals.
Error spur or crosstalk around –60 dBFS (1/1 mV) or lower at gigahertz sampling and gigahertz analog input frequencies (when applying near-full-scale signals) is typically acceptable in most multichannel systems, translating into a least significant bit (LSB) or error for a 12-bit system with an effective number of bits (ENOB) of approximately 10.
For example, the 12-bit, 1-VFS, 3.2-GSPS ADC12DJ3200 dual-channel ADC has an approximate 60 dB signal-to-noise + distortion (SINAD), equating to an ENOB of about 9.67, or ENOB = (SINAD(dBFS) – 1.76)/6.02. This means that the LSB size is about 1.2 mV using an ENOB of 9.67, or LSB = VFS/2N = 1/817. Since the sensitivity of the ADC is only about 60 dB, sensitivity to crosstalk is to be expected in this case. Further sensitivity will arise from the natural coupling internal to the ADC as the test analog input frequencies get higher.
In addition to checking for loss across multiple channels, you should also check to see whether signals with different amplitudes generate crosstalk in a linear fashion: that a –1 dBFS drop in interferer signal amplitude translates into an X-dBFS drop in the error spur on the affected channel or converter.
A thorough crosstalk test setup would not test only one tone as pictured in Figure 3 and Figure 4; you would want to sweep across a full range of frequencies and amplitudes in the band under consideration. Crosstalk can be sensitive to frequencies, but it may be difficult to predict these sensitivities without testing, especially when comparing different amplitudes. Once you understand the differences in frequency, applying frequency sweeps with amplitude sweeps in concert will result in an extensive set of data that may be even more helpful in determining which interferer tones to eliminate in a system design. Figure 5 depicts plots of variations in crosstalk levels by frequency, and how the noise floor may cause negligible crosstalk in certain frequency bands.
Figure 5 Channel 2 crosstalk is swept over various frequencies. Source: Texas Instruments
The plot in Figure 5 demonstrates a sweep of crosstalk results over 8 GHz versus four different interferer input amplitudes. As you can see, the ADC’s sensitivity is worst when the amplitude is at its highest. Lowering the interferer signal tone in amplitude only improves the crosstalk performance. This is a great test to exercise the device—either system or ADC—over the band of interest as well as the signal amplitude applied according to your application.
Another common test would be to apply a specific interferer frequency and sweep the amplitude, as shown in Figure 6.
Figure 6 Channel 2 crosstalk is shown as a function of interferer channel amplitude at various frequencies. Source: Texas Instruments
As you can see in Figure 5 and Figure 6, there is not necessarily a linear relationship between frequency and crosstalk. What we can conclude is that as the interferer signal becomes higher in frequency, higher in amplitude, or both, the sensitivity to crosstalk becomes worse.
What test results show
Crosstalk can be a culprit in multichannel systems that require a deep understanding of each converter channel’s sensitivity, such as in larger radar systems. In order to prevent noise and maximize performance, clean power and clocking are essential elements with which to begin; low-noise equipment and circuits are just as important. With too much noise in the circuitry, the slightest bit of crosstalk may render the device ineffective for the application.
In reality, our test bench gives a simplified view of the ADC in a more isolated environment. To gather a more realistic expectation of device performance at the system level, it would be prudent to gather similar test results in your own application board setup to verify that you can meet the converter’s datasheet performance. Otherwise, system channel sensitivities may be limited by crosstalk of the PCB design itself.
This article was originally published on Planet Analog.
Drew Pierpont is applications engineer at Texas Instruments.
Rob Reeder is high-speed converter application manager at Texas Instruments.