Understanding the critical role of the gate driver

Article By : Giovanni Di Maria

A good power circuit is not only composed of static devices. There is also the gate driver, an independent element that precedes the electronic switches and ensures the correct energy to drive them in the best way.

Silicon carbide and gallium nitride switching devices are the components mainly used in all power circuits. Despite their superior results of intrinsic characteristics concerning operating speed, high voltages, currents processed, and low power dissipation, designers pay all their attention to such devices, often forgetting to devote themselves to the related drivers.

What is the gate driver?

A good power circuit is not only composed of static devices such as SiC and GaN MOSFETs. There is also the gate driver, an independent element that precedes the electronic switches and ensures the correct energy to drive them in the best way. In fact, it is not sufficient for a square or rectangular wave to be sent directly to the gate terminal of the component. On the other hand, the driving signal must be suitably timed to send the right potentials to ensure the oscillations are suitable for the various components, reducing parasitic elements and cancelling the power losses as much as possible. Therefore, the designer must carry out the project relative to the circuit from the point of view of the final load while analyzing and creating an excellent gate driver that can drive the power components in the most optimal way possible.

A non-optimal driver not only determines significant power losses but often, the imperfect synchronizations cause an anomalous operation of the circuit, with the possible destruction of the MOSFETs. They are voltage-controlled devices, and the gate is their control terminal, which is electrically isolated from the device. A voltage must be applied to this terminal through a specially dedicated driver to make a MOSFET work.

The gate terminal of a MOSFET is, for all intents and purposes, a non-linear capacitor. Applying a charge on the gate capacitor brings the device to the “on” state, allowing the flow of current between the drain and source terminals. Instead, the discharge of this capacitor puts it in the “off” state. To make a MOSFET work, a voltage higher than the threshold voltage (VTH) must be applied between the gate and the source, which is the minimum voltage at which the capacitor is charged, and the MOSFET goes into conduction. Usually, a digital system (microcontroller, or MCU) is insufficient to activate the device, so an interface, precisely the driver, is always required between the control logic and the power switch.

One of the main functions performed by the gate driver is that of the level translator. However, the gate capacitor cannot charge instantaneously; it takes a while for it to fully charge. In this time, albeit very short, the device works with high current and voltage, dissipating high power in the form of heat. Unfortunately, this energy is unused and constitutes a loss of power. The transition from one state to another must therefore be extremely fast to minimize the switching time and to reduce this time, it is necessary to facilitate a high current transient to quickly charge the gate capacitor. Figure 1 concerns the response of a SiC MOSFET, used as an electronic switch, and shows the most important signals at the various nodes during a transient, and in particular:

  • The “V (pulse)” signal at the top represents the PWM wave that powers the system. It is an ideal rectangular signal with a frequency, in this case, of 100 kHz. It is a perfect signal.
  • The “V (gate)” signal represents the actual signal present on the gate terminal. As you can see, its trend is irregular, as the gate capacitance is not linear and its voltage reaches its maximum level after a few moments, which is the time necessary for the capacitor to charge to its maximum capacity. This interval is dictated by the time constant RC and, in this case, is about 150 ns.
  • The “I (load)” signal represents the current flowing through the load and the drain terminal. Initially, it is low when the MOSFET is open and then reaches the maximum level when the MOSFET is closed. This sequence is repeated indefinitely. Note that the switching is not immediate and instantaneous but follows that of the gate voltage.
  • The “V (drain)” signal shows the trend of the VGS voltage and, obviously, is in phase opposite to the current and always follows the charging speed of the gate capacitor.
  • The last graph shows the power dissipated by the MOSFET (VDS × ID) and, in correspondence with the rising and falling edges of the driving signal, it presents high harmful peaks. This is the loss of power, a factor that a gate driver must minimize as much as possible.

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Figure 1: The signals at the various nodes, during a transient of a SiC MOSFET

To minimize the power dissipated during the switching phases, the gate capacitor must be charged and discharged as quickly as possible. The market provides special circuits that minimize this transitional period. If a driver can deliver a higher gate current, the power losses are reduced, as the peak of the power transient is shorter. Broadly speaking, a gate driver performs the following tasks:

  • Translates the voltage levels to drive the gate up to the expectations of the circuit
  • Minimizes the switching time of the system
  • Delivers high current to quickly charge and discharge the gate capacitor

Many designers make the big mistake of driving the MOSFET directly through a logic gate on the MCU. While, on the one hand, it could provide the correct voltage to drive the device, the door of an MCU does not allow the transit of a high current, limiting itself to a supply of a few tens of milliamps. This fact causes a very slow charging of the gate capacitor, which is unacceptable in a few instances. In many cases, driving power MOSFETs directly from an MCU could overheat and damage the controller due to excessive current draw. By instead using a suitable gate driver, the rise and fall times are minimized, resulting in a more efficient system with very low power losses.

Figure 2 shows the gate capacitor’s charging and discharging transient relative to the silicon MOSFET’s use. The graph shows the gate capacitor charging transient of the IRL540 device, a MOSFET particularly useful for use with the logic gate voltage of an MCU. Although the model is compatible with TTL voltages, the driving of the gate must always be studied and performed in the best possible way by using an appropriate driver. In the example, the control of the gate is carried out in two ways with a suitable driver (blue graphic) and with the digital output port of a generic MCU (red graphic).

The two graphs show the typical charge and discharge curves of the capacitor, with the relative non-linearities of the case. On the leading edge of the driving signal, i.e., for the activation of the MOSFET, the times of the complete transient are as follows:

  • Charging of the gate capacity through a driver: 805 ns (blue trace)
  • Gate capacity charging via a GPIO: 11,000 ns (red trace)

As you can see, incorrect driving makes the activation of the MOSFET very slow, by about 14× — an unacceptable time that causes several switching losses. On the falling edge of the driving signal, i.e., for switching off the MOSFET, the times of the complete transient are as follows:

  • Discharging of the gate capacity through a driver: 500 ns (blue trace)
  • Gate capacity discharge via a GPIO: 5,000 ns (red trace)

Therefore, also for switching off, an incorrect gate driving makes the MOSFET’s deactivation very slow, by about 10× — also an unacceptable time.

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Figure 2: The IRL540 MOSFET driven by the port of an MCU (red trace) and by a driver (blue trace)

Analog Devices Inc.’s LTC7062 (see Figure 3) drives two N-channel MOSFETs with up to 100 V supply voltages. The drivers can operate with a different ground reference, with excellent noise immunity. The two drivers are symmetrical and independent of each other, allowing complementary or non-complementary switching. Its powerful 0.8-Ω pull-down and 1.5-Ω pull-up allow the use of a large gate capacity.

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Figure 3: An application example of the LTC7062 gate driver (Source: Analog Devices Inc.)

Conclusion

Gate drivers for SiC devices are much more complex than traditional ones, as they also have monitoring and protection functions. Obviously, there are many other considerations to make when choosing a gate driver. For example, it would be advisable to check the driver insulation, timing parameters, and noise immunity, to name a few. Lately, many companies are also taking a digital approach to new configurable drivers. In this way, the designers can program the operating modes to control the voltage levels and the relative working times. In practice, these are programmable MCUs capable of controlling any electrical behaviour without physically modifying the circuit. The gate driver is a real gem of technology, and designers should invest all the time and money necessary for it.

—Giovanni Di Maria has always been fond of electronics, maths and DIY. He is a computer programmer and a computer science and maths teacher. He loves figures and he’s always on the look out for big Prime Numbers. He has also written a book about PIC Microcontroller 16F84 programming with mikroBasic. He is the owner of Elektrosoft, a company that deals with electronics and information technology. He is a full time trainer and teacher.

This article was originally published on our sister site, Power Electronics News.

 

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